发明名称 Self alignment features for an electronic assembly
摘要 Some embodiments of the present invention relate to an electronic assembly that includes a substrate and a die. The electronic assembly further includes an alignment bump on one of the die and the substrate and a group of mating bumps on the other of the die and the substrate. The group of mating bumps is positioned such that if the alignment bump engages each of the mating bumps, the die is appropriately positioned relative to the substrate at that location where the alignment bump engages the group of mating bumps. In some embodiments, the alignment bump extends from the substrate while in other embodiments the alignment bump extends from the die. The alignment bump on the substrate (or die) may be part of a plurality of alignment bumps such that each alignment bump engages a different group of mating bumps on the die (or substrate).
申请公布号 US7482199(B2) 申请公布日期 2009.01.27
申请号 US20060533532 申请日期 2006.09.20
申请人 INTEL CORPORATION 发明人 KHANDEKAR VIREN V.;KIM CHUNHO
分类号 H01L21/00 主分类号 H01L21/00
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