MEMORY DEVICE, SERVER DEVICE, AND MEMORY CONTROL METHOD

摘要

A memory device of embodiments has a plurality of memory units, an error correction processor, and a memory controller. Each of the memory units has semiconductor memories, and writes in parallel and reads in parallel. The error correction processor converts input content data into recording data which includes the content data and, an error correction code. The error correction processor decodes the content data by performing conversion including error correction with respect to the recording data read out of the memory units. The memory controller writes recording data, which has been divided into a predetermined number of data, into an area of areas extending over the memory units. The memory controller reads the divided recording data out of the area. The memory controller determines that writing into the area has been completed normally, at a time of writing the divided recording data into the area, if the number of the semiconductor memories of which abnormality has been detected is less than or equal to a predetermined number of which abnormality is correctable by the error correction processor.

主权项

1. A memory device comprising:
a plurality of memory units each of which has semiconductor memories and writing in parallel and reading in parallel; an error correction processor that converts input content data into recording data which includes the content data and an error correction code, the error correction processor decoding the content data by performing conversion including error correction with respect to the recording data read out of the memory units; and a memory controller that writes recording data, which has been divided into a predetermined number of data, into an area of areas extending over the memory units, the memory controller reading the divided recording data out of the area, the memory controller determining that writing into the area has been completed normally, at a time of writing the divided recording data into the area, if the number of the semiconductor memories of which abnormality has been detected is less than or equal to a predetermined number of which abnormality is correctable by the error correction processor.