发明名称 CONTROLLING METHOD OF ERASE THRESHOLD VOLTAGE IN SEMICONDUCTOR DEVICE
摘要 A controlling method of erase threshold voltage in semiconductor device is provided to improve the threshold voltage distribution margin by reducing a threshold voltage variation rate. A controlling method of erase threshold voltage is comprised of the steps: applying verify voltage(Vf) to a first selected world line; applying first verify pass voltage(V1) to word line(WL2-WLn) connected to the n memory cell(F2-Fn) or the second memory cell; not making a soft-program operation to the n memory cells or the second memory cell; applying second verify pass voltage(V2) to 0 word line(WL0) connected to the 0 memory cell(F0); performing a soft-program operation to the 0 memory cell.
申请公布号 KR20090000394(A) 申请公布日期 2009.01.07
申请号 KR20070064426 申请日期 2007.06.28
申请人 HYNIX SEMICONDUCTOR INC. 发明人 SHIM, KEON SOO
分类号 G11C16/14;G11C16/16;G11C16/34 主分类号 G11C16/14
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