Operationsverstaerker

摘要

1,256,249. Transistor amplifying circuits. INTERNATIONAL BUSINESS MACHINES CORP. 16 Dec., 1968 [15 Dec., 1967], No. 59688/68. Heading H3T. An operational amplifier comprises sequentially a differential amplifier first stage having a transistor arranged as a current inverter in an output thereof, a low-input and high-output impedance transformer second stage coupled to the output of the first stage and a high-input and low-output impedance third stage coupled to the output of the second stage. The invention is derived from an arrangement in which the differential stage comprises transistors T1, T2, Fig. 6, with a common emitter resistor R1, the second stage transistor T3 of opposite conductivity type in common base connection with its collector load comprising the collector to emitter path of transistor T4, and the third stage a fieldeffect transistor T5 connected as a sourcefollower. In an embodiment, the first stage may comprise any one of the arrangements A1-A3, Fig. 7, the second stage any one of the arrangements B1-B3 and the third stage any of the arrangements C1-C3. In each of the arrangements A1-A3 the base of the current inverter transistor T0 is coupled to the collector of transistor T1; in arrangement A1 its collector is connected together with the collector of transistor T2 to the stage output terminal a. In arrangement A2 its collector comprises the stage output terminal a, its emitter being also driven from the collector of transistor T2, while in arrangement A3 the stage output terminal a is connected to the collector of transistor T2, while the collector of transistor T0 is connected to an additional stage output terminal b. In arrangement B1 the grounded-base transistor with input terminal a1 has the emitter-collector path of a further transistor T4 as its collector load; an additional input terminal b1, at the emitter of transistor T4, is provided for the arrangement of A3. In the arrangement B2 an additional transistor T41 is placed in series with the transistor T4; this also occurs in the arrangement B3 but in this a further transistor T31 is additionally placed in series with transistor T3. The arrangement C1 comprises a pair of emitter-followers T6, T7 in cascade, while in the arrangement C2 each of these transistors has a further transistor T8, T9 respectively as its emitter load. In the arrangement C3, a first emitter-follower T6 has a further transistor T8 as its emitter load, and it drives a complementary-pair emitter follower output stage comprising transistors T7, T10.