| 摘要 |
PURPOSE:To obtain a logical circuit of low power consumption with a comparatively small pattern area, by controlling the conduction of two MOS transistors (TRs) with an input signal from the 1st terminal and controlling the conduction of the other two TRs with a signal from the 2nd terminal. CONSTITUTION:When both input signals Di1, Di2 are low level, transistors TRs Q1, Q2 are turned off and TRs Q7, Q8 are turned off. Thus, a voltage is applied to an output terminal out via TRs Q8, Q7 and an output signal Eo2 turns to a high level. When one of the signals Di1, Di2 is a high level and the other is a low level, since the TRs Q1, Q2 and the TRs Q7, Q8 are turned on for one group and off for the other, the terminal Out is grounded, the signal Eo2 turns to a low level and no DC through-current flows. Further, when both the signals Di1, Di2 are a high level, the TRs Q1, Q2 are turned on and the TRs Q7, Q8 are turned off and the terminal Out turns to a high level. |
