发明名称 Gate circuit for gate turn-off thyristor.
摘要 <p>A gate circuit for turning off a gate turn-off thyristor the circuit providing a signal of rapid voltage rise and high peak value followed by successive signals of low peak value. The circuit uses a pulse transformer, whose primary winding is divided at least into three sections, which is associated with three windings capacitors which are respectively connected with the junctions of the sections.</p>
申请公布号 EP0112096(A2) 申请公布日期 1984.06.27
申请号 EP19830307318 申请日期 1983.12.01
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 NAGATAKA, SEKI PATENT DIV. TOKYO SHIBAURA
分类号 H02M1/06;H03K17/723;(IPC1-7):03K17/73 主分类号 H02M1/06
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