发明名称 SIGNAL PROCESSING CIRCUIT
摘要 PURPOSE:To improve reliability, by setting an error flag when a modulation pattern is placed out of a role, or when the boundary of a block is disturbed, and performing a demodulation by using the flag. CONSTITUTION:When an input data 101 is inputted to a demodulation circuit, it is demodulated to the data of m-number bits in the unit of n-number bits, and simultaneously, a synchronization detecting circuit 103 detects a synchronizing signal from the input data 101, and those results are sent to a demodulation data memory 104. At the demodulation data memory 104, one block of (k)+(j) bits of data is sent out to the demodulation system B of an ECC wit the error flag, immediately after the synchronizing signal. At an error flag sending circuit 105, two kinds of error flags, Ef1 and Ef2, are sent out, and the Ef1 is set at each byte in the whole of the block in which no synchronizing signal is detected at the synchronization detecting circuit 103, and the Ef2 is set at the byte including the demodulation pattern of m-number of bits other than the pattern of 2-number of bits regulated by a rule.
申请公布号 JPS62262279(A) 申请公布日期 1987.11.14
申请号 JP19860104766 申请日期 1986.05.09
申请人 OKI ELECTRIC IND CO LTD 发明人 NAGAI TSUNEO
分类号 G11B20/18 主分类号 G11B20/18
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