| 摘要 |
<p>A method for fabricating a transistor with a vertical channel is provided to improve the electrical characteristic and reliability of a transistor with a vertical channel by easily removing a desired portion of a metal nitride layer formed on a semiconductor pattern. A semiconductor substrate(100) is partially etched to form a semiconductor pattern(150) including a first portion(150a) extended in a vertical direction and a second portion(150b) formed on the first portion wherein a channel is formed in the first portion. A gate insulation layer(140) is formed on the lateral surface of the first portion. A metal nitride layer is formed on the gate insulation layer and the second portion. A metal layer pattern is formed on the substrate between the semiconductor patterns, exposing the second portion and burying the first portion. A buffer layer pattern is formed on the metal layer pattern, exposing the second portion. The metal nitride layer position on the second portion is removed by using the buffer layer pattern as a passivation layer. The buffer layer pattern is removed to partially expose the metal nitride layer. The exposed metal nitride layer is removed. The metal layer is etched to form a gate electrode on the gate insulation layer.</p> |
