Verfahren zum Herstellen einer Halbleiteranordnung.

摘要

A method of manufacturing a semiconductor device including both an enhancement (1) insulated gate field effect transistor (IGFET) and a depletion (2) mode IGFET is described. Impurities are introduced into a first region or epitaxial layer (4) of one conductivity type adjacent a given surface (3a) of a semiconductor body (3) to provide, for both the enhancement mode (1) and for the depletion mode (2) IGFET, a second region (5) of the opposite conductivity type adjacent the given surface, a source region (9) of the one conductivity type adjacent the given surface (3a) and surrounded by the second region (5) and a drain region (10) of the one conductivity type having a relatively lowly doped drain extension region (11)adjacent the given surface and extending towards the source region (9). First and second insulated gates (12) are provided on first and second areas (31a) and (31b), respectively of the given surface to provide a respective gateable connection between each source region (a) and the associated drain region (10). The relative doses of impurities introduced to provide the second regions (5) and the relatively lowly doped drain extensions (1) received by the first area (31a) and the second area (31b) are independently controlled so as to provide adjacent the first area (31a) a channel area (13) of the opposite conductivity type and adjacent the second area (31b) a channel area (13 min )of the one conductivity type.