发明名称 Aligning calibration segments for increased availability of memory subsystem
摘要 A method and apparatus for aligning calibration segments for increased availability of a memory subsystem is disclosed. In one embodiment, a memory subsystem includes a memory and a memory controller coupled thereto via a number of independently operable channels (interfaces). The memory controller may convey on each of the channels at least one corresponding data strobe signal. The data strobe signal in each channel may be periodically calibrated. The memory controller may be configured to align the periodic calibrations in time so that they are performed concurrently instead of in a staggered manner. During the time the calibrations are performed on each channel, the memory may be unavailable for normal accesses.
申请公布号 US9384820(B1) 申请公布日期 2016.07.05
申请号 US201514738119 申请日期 2015.06.12
申请人 Apple Inc. 发明人 Parik Neeraj;Vijayaraj Thejasvi Magudilu;Hsiung Kai Lun;Liu Yanzhe
分类号 G11C7/22;G11C11/4076;G11C11/406;G11C11/4096 主分类号 G11C7/22
代理机构 Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C. 代理人 Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C. ;Heter Erik A.
主权项 1. A system comprising: a memory; and a memory controller coupled to the memory via a plurality of independent channels, wherein for each of the plurality of channels, the memory controller is configured to convey to the memory a corresponding at least one of a plurality of data strobe signals, and wherein the memory controller is further configured to perform periodic calibrations of the plurality of data strobe signals; wherein the memory controller includes a control circuit to cause the periodic calibrations of each of read data strobe signals and each of write data strobe signals to be performed concurrently with one another, and further configured to cause periodic refreshes of the memory to be performed across all channels concurrently, and wherein the memory is unavailable during the periodic calibrations and the periodic refreshes.
地址 Cupertino CA US