| 摘要 |
1287780 Pulse and switching circuits TELEFONAKTIEBOLAGET L M ERICSSON 17 Nov 1969 [15 Nov 1968] 56230/69 Heading H3P [Also in Division G4] Apparatus, e.g. two computers A and B, to be operated in parallel, are supplied with clock pulses from an oscillator 1 via a circuit comprising AND gates 4, 5 and a bi-stable device 6 arranged so that, if a fault is detected in the pulse train, a second oscillator 1a is substituted for the first. In the embodiment two computers A, B are operated in parallel and synchronism from the single pulse train. The oscillator 1 is followed by an emitter follower 2 to produce square pulses which are amplified at 3 and applied directly to one input a of AND gates 4, 4a. Oscillator 1a is similarly connected to AND gates 5, 5a. The other inputs to the AND gates are connected as shown to the bi-stable devices 6, 6a which are initially set to the 1 (or 0) state by a signal on line "oscillator 1 (or 1a)". The pulses are also applied to an amplifier 71 and integrator 72 and, inverted, to another amplifier 73 and integrator 74. If the pulse length or spacing exceeds predetermined limits the voltage output from integrator 72 or 74 exceeds the triggering point of a Schmitt trigger or differential amplifier 76 which changes over the bi-stable device 6 (and similar for 6a). Signals can be applied on lines 11, 12 which lengthen the pulses or spaces to test the system. |
