发明名称 |
Byte- and block-erasing of an electrically erasable and programmable read-only memory array. |
摘要 |
A method for either block- or byte-erasing is described for an array of EEPROM cells, each having transistor channel regions with subchannels thereof respectively controlled by a floating gate conductor and a control gate. Erasing occurs through a Fowler-Nordheim tunnel window (34) between a source bit line (24) and a floating gate conductor (42) of a selected cell. For one or more selected cells, first and second erasing voltages are selected such that the selected source bit line (24) is more positive than the selected word line (48) by a voltage sufficient to cause excess electrons on the floating gate conductor (42) to be drawn through the tunnel window (34) to the source region (24). The nonselected word lines (48) have a nonerasing voltage impressed thereon that is sufficiently close to that of selected source regions that no erase disturb will occur in nonselected cells.
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申请公布号 |
EP0405140(A1) |
申请公布日期 |
1991.01.02 |
申请号 |
EP19900109884 |
申请日期 |
1990.05.23 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
GILL, MANZUR;D'ARRIGO, IANO;LIN, SUNG-WEI;MCELROY, DAVID |
分类号 |
H01L21/8247;G11C17/00;G11C16/02;G11C16/16;H01L27/115;H01L29/788;H01L29/792 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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