发明名称 Asymmetric alignment of substrate interconnect to semiconductor die
摘要 An apparatus includes a first semiconductor die and at least one further semiconductor die. A substrate is attached to the first die and the further die and has an electrical interconnect pattern that interconnects contacts on the first die with respective contacts on the further die. Features of the interconnect pattern have positions on the substrate with smaller tolerances relative to positions of the contacts on the first die than to positions of the contacts on the further die.
申请公布号 US2007096303(A1) 申请公布日期 2007.05.03
申请号 US20050260334 申请日期 2005.10.27
申请人 LSI LOGIC CORPORATION 发明人 DELP GARY S.
分类号 H01L23/34;H01L21/00 主分类号 H01L23/34
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