Programmable frequency range for boost converter clocks

摘要

Techniques for generating a boost clock signal for a boost converter from a buck converter clock signal, wherein the boost clock signal has a limited frequency range. In an aspect, the boost clock signal has a maximum frequency determined by Vbst/T, wherein Vbst represents the difference between a target output voltage and a battery voltage, and T represents a predetermined cycle duration. The boost converter may include a pulse insertion block to limit the minimum frequency of the boost clock signal, and a dynamic blanking/delay block to limit the maximum frequency of the boost clock signal. Further techniques are disclosed for generally implementing the minimum frequency limiting and maximum frequency limiting blocks.

主权项

1. An apparatus comprising:
a buck converter configured to generate a first output voltage at a first output node; and a boost converter comprising a switched-mode power supply configured to generate a second output voltage at a second output node, the power supply comprising:
a first switch coupled to an inductor, the first switch configurable to be selectively closed or opened; anda control block configured to generate a control signal from a buck clock signal used in the buck converter to configure the first switch to be selectively closed or opened,the control block comprising a first limiting circuit configured to set a frequency of the buck clock signal to a minimum frequency in response to the frequency being less than the minimum frequency, and a second limiting circuit configured to set the frequency of the buck clock signal to a maximum frequency in response to the frequency being greater than the maximum frequency, a frequency of the control signal being between the minimum frequency and maximum frequency.