发明名称 Eigensichere Schaltung fuer eine nicht eigensichere Informations-Verarbeitungseinrichtung
摘要 An intrinsically safe circuit for information processing devices (6) which are not intrinsically safe, with the aid of a program switch an a safety element triggering on a pulse and tested by short simulation pulses. The test device consists of an address counter (1) of test status memory cells (2), of output memory cells (3), return signalling lines (8) and a comparison circuit (9) for both (3, 8). In the case of non-correspondence and with a permanent fault, the comparison circuit (9) generates an interference signal (10). Switches (5) connect the information processing device (6) to the test status memory (2) or the measuring and/or command points (4), return signalling lines (8) are connected to the outputs of the information processing blocks (6') or of information evaluating stations (7). The comparison circuits (9) generate fault signals when maximum or minimum values are exceeded. Correction circuits correct deviations within predetermined limits. The circuit is used for process controls. <IMAGE>
申请公布号 DE2815625(B1) 申请公布日期 1978.12.07
申请号 DE19782815625 申请日期 1978.04.11
申请人 LGZ LANDIS & GYR ZUG AG, ZUG (SCHWEIZ) 发明人 SCHWARZ, SIEGFRIED, 7562 GERNSBACH
分类号 G05B23/02;(IPC1-7):G05B23/02 主分类号 G05B23/02
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