| 摘要 |
PURPOSE:To prevent each buffer memory from being increased at its storage capacity by allowing a full coincidence detecting circuit to detect the heads of response output signals from all function elements to generate a reading address, and controlling the full coincidence detecting circuit through an overflow detector. CONSTITUTION:When the heads of response outputs from respective function elements DUT1 to DUTN to be tested responding to a test pattern signal supplied from a pattern generator 100 are detected, respective writing address generators 600A to 600N are started and the outputs of the elements DUT1 to DUTN are written in buffer memories BF1 to BFN. A reading address generator 800 is controlled by the full coincidence detecting circuit 700 in accordance with the detection of respective heads and the contents of respective memories BF1 to BFN are read out to test the elements DUT1 to DUTN by comparing the read contents with an expected pattern signal. The circuit 700 is forcedly turned to a full coincidence detecting state through a control coincidence signal generator 20 before the overflow of the memories BF1 to BFN. Thereby, each buffer memory can be prevented from being increased at its storage capacity. |
