Low power switching techniques for digital-to-analog converters

摘要

Embodiments of the present disclosure provide improved switching techniques for controlling three-level DAC cells employing a return-to-hold scheme. Disclosed techniques include switching a DAC cell off for at least the duration of a time period between two hold periods while a digital value of zero is being converted. Because the DAC cell is switched off between two hold periods, the current source drain voltage is not disturbed during the critical transient times when D flip-flop outputs change, which happens during the hold periods, in response to change of digital values to be converted. In this manner, power consumption may be reduced while preserving the high performance properties of a three-level return-to-hold DAC.

主权项

1. A digital-to-analog converter (DAC) comprising:
a plurality of DAC cells, each DAC cell comprising a three-level current steering DAC cell configured to maintain an analog output associated with a conversion of each digital value provided to the DAC cell to a next digital value for a hold period associated with the each digital value changing to the next digital value; and one or more controllers for controlling the plurality of DAC cells, wherein the one or more controllers are configured to, for each DAC cell of the plurality of DAC cells,
determine that a first digital value provided to the DAC cell changes to a second digital value, the second digital value being zero,identify that the second digital value is the first zero value of k consecutive zero digital values, k being an integer equal to or greater than two, andprevent the DAC cell from conducting current at least during a time period between the end of a hold period associated with the change of the first digital value to the second digital value and the beginning of a hold period associated with a change of a digital value that is one before last of the k consecutive zero digital values to a digital value that is the last digital value of the k consecutive zero digital values.