Insulated gate field effect transistor structure and use in logic gates.

摘要

This structure comprises in an epitaxial layer 40 a P type diffused region 41 and zones 42 and 43 diffused within this region 41. A source electrode is integral with the epitaxially grown layer 40 and drain electrodes D1, D2 of the N+ type diffused zones 42 and 43. This gives a multidrain transistor. Furthermore, each drain may be associated with a plurality of gate electrodes G1, G2. Application to the construction of logic circuits in association with high tension bipolar structures. <IMAGE>