发明名称 APPARATUS AND METHOD FOR VERIFYING ERROR OF READING/WRITING DATA
摘要 PURPOSE: An apparatus and method for verifying an error of reading/writing data are to populate a parity logic in a memory. CONSTITUTION: An apparatus for verifying an error of reading/writing data comprises: a parity input/output unit(3) for inputting a parity from the outside and outputting a parity generated in the inside; a parity check unit(4) for inputting data provided from a data input/output unit(1) to a data buffering unit(2) and the parity of the parity input/output unit(3) and checking whether a current data is error in analyzing an odd/even mode of the current parity; and a parity generating unit(5) for inputting data from the data buffering unit(2) to the data input/output unit(1) and the error detecting signal and the mode setting signal of the parity check unit(4), and outputting the parity value of the current set parity mode. Thereby, the basic cost of the system is decreased and the manufacture is easily performed.
申请公布号 KR20000009118(A) 申请公布日期 2000.02.15
申请号 KR19980029312 申请日期 1998.07.21
申请人 HYUNDAI ELECTRONICS IND. CO.,LTD 发明人 SIN, DONG WOO
分类号 G06F11/00;(IPC1-7):G06F11/00 主分类号 G06F11/00
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