发明名称 SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To achieve micronization without dropping the driving force of an element by checking the dose loss phenomena after implantation of impurity ions. SOLUTION: A dislocation loop defective layer 19 is provided in a position shallower than the implantation range of the impurity ions of a p-type extension high concentration diffused layer 16, in the region at the side of the gate electrode 13 in an n-type well 11a. Since this translocation loop defective layer 19 suppresses the dose loss of impurity atoms which form the p-type extension high concentration diffused layer 16, the drop of the driving force of a transistor is suppressed, and a MIS-type transistor with a short gate can be achieved.
申请公布号 JP2002203962(A) 申请公布日期 2002.07.19
申请号 JP20010299461 申请日期 2001.09.28
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NODA YASUSHI
分类号 H01L29/78;H01L21/265;(IPC1-7):H01L29/78 主分类号 H01L29/78
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