| 摘要 |
PROBLEM TO BE SOLVED: To obtain the instruction controller which eliminates the need for hardware which performs a comparing process, etc., relating to an instruction sequence identifier by moving stored information among entries so that entries including unissued instructions constitute entries in continuous order and equalizing the quantity of the movement among the entries to up to the number of instructions which can be decoded at the same time. SOLUTION: Instructions decoded newly by entries RSE 2 and RSE 4 which become free are shifted in order from the high-order side and stored. Consequently, instructions 1, 3, 5, and 6 are stored in entries RSE 5 to RSE 2 in the older order of instruction decoding. Further, a reservation station 14 when issuing instructions to an execution unit 15 only issues executable instructions in order from the low-order side of the RSE 5 to guarantee the instruction decoding order. Consequently, conventional logic circuits, in-chip wiring areas, etc., for making it possible to store all decoded instructions in the entries RSE 0 to RSE 5 are greatly reduced.
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