| 摘要 |
PURPOSE:To control frequency accurately, and to reduce power consumption by controlling an oscillation means so that a fundamental frequency signal is kept within a range, in which the fundamental frequency signal is higher than lower-limit driving frequency or lower than upper-limit driving frequency, in response to an output from a frequency comparison means. CONSTITUTION:Outputs from counters 7, 8 and the frequency of an output pulse signal phiUSR from a VCO (a voltage-controlled oscillator) 6 are compared by output signals Sig1, Sig2 from D-flip-flops 10, 11. Voltage VDAC is increased and driving frequency is lowered when a fundamental frequency signal is larger than upper-limit frequency, and voltage VDAC is lowered and driving frequency is elevated when the fundamental frequency signal is smaller than lower-limit frequency. Accordingly, frequency setting resolution in the vicinity of driving frequency can be fined without increasing power consumption particularly, and driving, in which no abnormal sound is generated due to a frequency change, is enabled while positively keeping a stable operating range. |
