| 摘要 |
PROBLEM TO BE SOLVED: To reduce an area of a memory cell of a static semiconductor memory device and simplify a wiring structure. SOLUTION: nMOS transistors Q1, Q2, Q5 and Q6, and pMOS transistor Q2 and Q4, are formed on a SOI layer. One impurity diffusion region of the transistors Q3 and Q4 are connected to another impurity region of the transistors Q1 and Q2. One end of a longitudinal direction of a polysilicon layer 2b1 is extended and connected to another impurity diffusion region of the transistor Q6. One end of a longitudinal direction of a polysilicon layer 2b2 is extended to the opposite direction and connected to another impurity diffusion region of the transistor Q5.
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