METHOD AND STRUCTURE TO DEVELOP A TEST PROGRAM FOR SEMICONDUCTOR INTEGRATED CIRCUITS,申请号EP20050743229-传众专利搜索

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发明名称	METHOD AND STRUCTURE TO DEVELOP A TEST PROGRAM FOR SEMICONDUCTOR INTEGRATED CIRCUITS
摘要
申请公布号	EP1756601(B1)	申请公布日期	2009.12.09
申请号	EP20050743229	申请日期	2005.05.23
申请人	ADVANTEST CORPORATION	发明人	PRAMANICK, ANKAN;ELSTON, MARK;KRISHNASWAMY, RAMACHANDRAN;ADACHI, TOSHIAKI
分类号	G01R31/3183;G01R31/319;G06F11/263	主分类号	G01R31/3183
代理机构		代理人
主权项
地址

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