发明名称 Semiconductor memory device and testing method therefor
摘要 In a test operation for a semiconductor memory device, memory power supply lines are disconnected from a power supply node by using switch gates. Voltages of the memory power supply lines are detected using detection holding circuits. When the detected voltage is lower than a predetermined value, the corresponding memory power supply line is driven to a ground voltage level by the detection holding circuit. Thereby, a standby-current-defective but normally-operable memory cell is forced to an operation-defective state. Then, the standby-current-defective memory cell is identified, and redundancy replacement is performed thereon. Consequently, the standby current abnormality in the semiconductor memory device can be repaired.
申请公布号 US2002167849(A1) 申请公布日期 2002.11.14
申请号 US20020137352 申请日期 2002.05.03
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 OHBAYASHI SHIGEKI;KASHIHARA YOJI;UKITA MOTOMU
分类号 G01R31/28;G01R31/3185;G11C11/413;G11C29/00;G11C29/04;G11C29/12;G11C29/50;(IPC1-7):G11C5/00 主分类号 G01R31/28
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