发明名称 |
FinFET semiconductor device having increased gate height control |
摘要 |
A semiconductor device includes a silicon-on-insulator (SOI) substrate having a buried oxide (BOX) layer, and a plurality of semiconductor fins formed on the BOX layer. The plurality of semiconductor fins include at least one pair of fins defining a BOX region therebetween. Gate lines are formed on the SOI substrate and extend across the plurality of semiconductor fins. Each gate line initially includes a dummy gate and a hardmask. A high dielectric (high-k) layer is formed on the hardmask and the BOX regions. At least one spacer is formed on each gate line such that the high-k layer is disposed between the spacer and the hardmask. A replacement gate process replaces the hardmask and the dummy gate with a metal gate. The high-k layer is ultimately removed from the gate line, while the high-k layer remains on the BOX region. |
申请公布号 |
US9379135(B2) |
申请公布日期 |
2016.06.28 |
申请号 |
US201514723681 |
申请日期 |
2015.05.28 |
申请人 |
GLOBALFOUNDRIES INC. |
发明人 |
Cheng Kangguo;Khakifirooz Ali;Ponoth Shom;Sreenivasan Raghavasimhan |
分类号 |
H01L27/12;H01L21/762;H01L21/84;H01L29/66;H01L29/06;H01L29/423;H01L29/78 |
主分类号 |
H01L27/12 |
代理机构 |
Hoffman Warnick LLC |
代理人 |
Canale Anthony;Hoffman Warnick LLC |
主权项 |
1. A semiconductor device, comprising:
a silicon-on-insulator (SOI) substrate including a buried oxide (BOX) layer; a plurality of semiconductor fins formed on the BOX layer, the plurality of semiconductor fins including at least one pair of fins defining a BOX region of the BOX layer therebetween; a plurality of gate lines formed on the SOI substrate and extending across the plurality of semiconductor fins, each gate line including at least one metal gate stack; at least one spacer formed on each metal gate stack; and a protective layer formed on the BOX region. |
地址 |
Grand Cayman KY |