发明名称 DIGITAL PROTECTION RELAY
摘要 PROBLEM TO BE SOLVED: To rationally determine performance and reduce the number of tests by performing transient characteristic tests using input for testing fine timing obtained by taking out sampling timing and synchronizing it with protective relay processing. SOLUTION: A clock a is sent from a clock circuit 1 to a control circuit 2, and S/H control c and A-D conversion control d are exercised by means of a timing control signal b. A comparison value from CPU 5 is written on memory 7 for comparison through a control circuit 6. A count value h on a counter 8 and the value stored in memory 7 are compared with each other using a comparator 9. An off-delay timer 10 is operated using the output of the comparator to produce a timer output j. The timer output is taken out of an output circuit 11. Taking out sampling timing, as mentioned above, enables output at fine timing synchronized with protective relay processing. This allows rational determination of performance to be expected, and reduces the number of tests.
申请公布号 JPH09261838(A) 申请公布日期 1997.10.03
申请号 JP19960069544 申请日期 1996.03.26
申请人 MEIDENSHA CORP 发明人 MATSUI TOSHIAKI
分类号 G01R31/327;G01R31/333;H02H3/02;H02H3/05 主分类号 G01R31/327
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