发明名称 ELECTRONIC CIRCUITS
摘要 An electronic circuit comprises: an input terminal; an output terminal; first and second supply rails; first, second, third, and fourth field effect transistors, FETs, each of a first type and each having respective gate, source and drain terminals; and first and second loads. The source of the first FET is connected to the first supply rail, the drain of the first FET and the source of the second FET are connected to the output terminal, the drain of the second FET is connected to the second supply rail, the gate of the third FET and the gate of the fourth FET are connected to the input terminal, the drain of the third FET is connected to the second supply rail, the first load is connected between the first supply rail and the source of the third FET, and the second load is connected between the drain of the fourth FET and the second supply rail. In one aspect of the invention, the gate of the first FET is connected to a node between the source of the third FET and the first load such that a voltage at the source of the third FET is applied to the gate of the first FET, and the gate of the second FET is connected to a node between the drain of the fourth FET and the second load such that a voltage at the drain of the fourth FET is applied to the gate of the second FET.
申请公布号 US2016173099(A1) 申请公布日期 2016.06.16
申请号 US201414905737 申请日期 2014.07.16
申请人 PRAGMATIC PRINTING LTD 发明人 de Oliveira Joao;White Scott Darren;Ramsdale Catherine
分类号 H03K19/0944;H03K3/03;H03K3/356;H03K23/00;H03K19/20;H03K3/037 主分类号 H03K19/0944
代理机构 代理人
主权项 1. An electronic circuit comprising: an input terminal; an output terminal; a first supply rail; a second supply rail; a first field effect transistor, FET, of a first type and having respective gate, source and drain terminals; a second FET of said first type and having respective gate, source and drain terminals; a third FET of said first type and having respective gate, source and drain terminals; a fourth FET of said first type and having respective gate, source and drain terminals; a first load; and a second load, wherein the source of the first FET is connected to the first supply rail, the drain of the first FET and the source of the second FET are connected to the output terminal, the drain of the second FET is connected to the second supply rail, the gate of the third FET and the gate of the fourth FET are connected to the input terminal, the drain of the third FET is connected to the second supply rail, the first load is connected between the first supply rail and the source of the third FET, the second load is connected between the drain of the fourth FET and the second supply rail, the gate of the first FET is connected to a node between the source of the third FET and the first load such that a voltage at the source of the third FET is applied to the gate of the first FET, and the gate of the second FET is connected to a node between the drain of the fourth FET and the second load such that a voltage at the drain of the fourth FET is applied to the gate of the second FET.
地址 Cambridge GB