发明名称 |
Flippable leadframe for packaged electronic system having vertically stacked chips and components |
摘要 |
A leadframe (100) for electronic systems comprising a first sub-leadframe (110) connected by links (150) to a second sub-leadframe (120), the first and second sub-leadframe connected by tiebars (111, 121) to a frame (130); and each link having a neck (151) suitable for bending the link, the necks arrayed in a line (170) operable as the axis for bending the second sub-leadframe towards the first sub-leadframe with the necks operable as rotation pivots. |
申请公布号 |
US9496206(B2) |
申请公布日期 |
2016.11.15 |
申请号 |
US201514683277 |
申请日期 |
2015.04.10 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
Eugene Lee Lee Han Meng@;Bin Abdul Aziz Anis Fauzi;Fen Sueann Lim Wei |
分类号 |
H01L21/00;H01L23/495;H01L21/48;H01L21/56;H01L21/78;H01L23/31 |
主分类号 |
H01L21/00 |
代理机构 |
|
代理人 |
Keagy Rose Alyssa;Cimino Frank D. |
主权项 |
1. A method for assembling an electronic system comprising:
providing a leadframe strip having a first and a second surface and a plurality of assembly sites, each site including a leadframe with a pair of a first sub-leadframe connected by links to a second sub-leadframe, the pair connected by tiebars to the leadframe; each link of the pair having a neck suitable for bending the link, and the necks arrayed in a line operable as the axis for bending the second sub-leadframe towards the first sub-leadframe with the necks operable as rotation pivots; the first sub-leadframe including a pad suitable as substrate of the electronic system; and the second sub-leadframe including leads having wide portions in an area approximately matching the area of the pad, and narrow portions outside the matched area; attaching the terminals of a semiconductor chip to the first surface of the wide portions of the second sub-leadframe; trimming the tie-bars to the leadframe of the second sub-leadframe; folding the second sub-leadframe at the bendable necks to rotate the second sub-leadframe around the axis until the second sub-leadframe is aligned on top of the first sub-leadframe and spaced from the first sub-leadframe by a gap while the semiconductor chip touches the first surface of the pad; and attaching discrete components onto the second surface of the second sub-leadframe. |
地址 |
Dallas TX US |