| 摘要 |
<p>PROBLEM TO BE SOLVED: To obtain a semiconductor nonvolatile memory device by which the burden of a microprocessor is reduced by a method wherein, by the instruction of the microprocessor, an erase operation is performed automatically by an internal erase control circuit in a state that the circuit is separated from the microprocessor. SOLUTION: An N-channel MOSFET Q18 and a P-channel MOSFET Q17 which are switching-controlled by an erase circuit ERC are connected to a source line CS. The circuit ERC turns on the FET Q18 in a write mode and a readout mode, and it gives a ground potential to the source line CS. On the other hand, in an erase mode, the circuit ERC turns on the FET Q17, and it gives a high voltage VPP for erase to the source line CS. In this manner, the source line CS is installed as one line, the circuit ERC and the FET's Q17, Q18 are installed so as to correspond to it, and storage information in all memory cells constituting a memory array M-ARY can be erased collectively. Thereby, a control operation to an EEPROM from a microprocessor is performed in a slight time required for instructing the start of an erase operation, the burden of the microprocessor can be reduced, and the throughput of a system can be enhanced.</p> |
