发明名称 Leiterplatte mit Zugentlastung für Anschluß-Kabel, Verfahren zu deren Herstellung und Verbindung sowie deren Verwendung
摘要 The PCB has conducting tracks (7,8) at least in the region of the contact surfaces (5,6) each designed as a plane surface. At least one holding element (2) extends above this plane surface, for the reception of the encased cable ends (3,4). The holding element is designed as a cable lead-in with channel-type recesses (16,17) for the reception of the encased cable ends. The cross-section of the recesses is so selected, that the respective cable seen in cross section can be completely accepted, and each of the channel-type recesses is arranged with at least one conductor outgoing section, adjacent to a contact (5,6) of the conductor track (7,8). The PCB substrate and the holding element are designed together as a monolithic component.
申请公布号 DE19640058(C2) 申请公布日期 1999.06.10
申请号 DE1996140058 申请日期 1996.09.30
申请人 HERAEUS SENSOR-NITE GMBH, 63450 HANAU, DE 发明人 DAMASCHKE, GERHARD, 65439 FLOERSHEIM, DE;SCHLAG, FRANK, 21073 HAMBURG, DE;WIENAND, KARLHEINZ, DR., 63741 ASCHAFFENBURG, DE
分类号 G01K7/16;G01K7/18;G01R27/26;H01C17/28;H01R4/02;H01R12/62;H05K1/00;H05K1/02;H05K1/11;H05K1/16;H05K3/30;H05K3/32;(IPC1-7):H05K3/32;H05K3/34 主分类号 G01K7/16
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