CMOS data reset circuit with indicating unit

摘要

A complementary metal oxide semiconductor (CMOS) data reset circuit includes a control unit, a south bridge chip including a reset pin electrically coupled to the control unit, and a indicating unit electrically coupled between the control unit and the south bridge chip. The control unit outputs a control signal to the reset pin and the indicating unit to cause resetting of the CMOS data by the south bridge chip and the indicating unit indicates the resetting of CMOS data as it takes place.

主权项

1. A complementary metal oxide semiconductor (CMOS) data reset circuit comprising:
a control unit configured to output a control signal; a south bridge chip electrically coupled to the control unit and comprising a reset pin, the reset pin configured to enable the south bridge chip to reset CMOS data in accordance with the control signal; and an indicating unit electrically coupled to the control unit and the south bridge chip, and configured to output an indicating signal in accordance with the control signal; wherein the indicating signal is configured to indicate the resetting of the CMOS data by the south bridge chip and indicate that the south bridge chip has stopped resetting CMOS data.