发明名称 A METHOD, APPARATUS AND COMPUTER PROGRAM PRODUCT FOR OPTIMIZING AN INTEGRATED CIRCUIT LAYOUT
摘要 A method, apparatus, and computer program product for optimizing the layout of an integrated circuit design. Base ground rules and recommended ground rules are prioritized according to the impact they have on the yield of the integrated circuit design. The layout is optimized according to the prioritized base ground rules and recommended ground rules.
申请公布号 US2007204249(A1) 申请公布日期 2007.08.30
申请号 US20060276374 申请日期 2006.02.27
申请人 HIBBELER JASON D 发明人 HIBBELER JASON D.
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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