发明名称 Use of silicon block process step to camouflage a false transistor
摘要 The spacing between the source/drain and gate electrodes of a non-operable MOSFET is set to a distance equal to a sidewall spacer to increase the similarity between non-operable and operable devices. The device structure inhibits attempts at reverse engineering.
申请公布号 GB0622262(D0) 申请公布日期 2006.12.20
申请号 GB20060022262 申请日期 2003.11.20
申请人 HRL LABORATORIES LLC;RAYTHEON COMPANY 发明人
分类号 H01L23/58;H01L27/02 主分类号 H01L23/58
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