发明名称 Solid state devices having fine pitch structures
摘要 In various embodiments, a method for forming a memory array includes forming a plurality of rows and columns of hardmask material, etching holes in the one or more layers of insulating material using the combined masking properties of the rows of hardmask material and the columns of hardmask material, and forming memory cells in the holes. The corners of the holes can be rounded.
申请公布号 US9437657(B2) 申请公布日期 2016.09.06
申请号 US201514616128 申请日期 2015.02.06
申请人 HGST, Inc. 发明人 Shepard Daniel R.
分类号 G03F7/26;H01L27/24;H01L21/311;H01L45/00;H01L21/033;H01L27/102 主分类号 G03F7/26
代理机构 Patterson & Sheridan, LLP 代理人 Patterson & Sheridan, LLP
主权项 1. A method for forming an array, the method comprising: forming a plurality of rows of hardmask material above one or more layers of insulating material; forming a plurality of columns of hardmask material above the plurality of rows of hardmask material; etching holes in the one or more layers of insulating material using the combined masking properties of the rows of hardmask material and the columns of hardmask material; and forming memory cells in the holes, wherein a first subset of the plurality of rows are formed by a lithographic step and wherein a second subset of the plurality of rows are thereafter formed by a deposition step, wherein the second subset of the plurality of rows are deposited between the first subset of the plurality of rows; and wherein the first subset of the plurality of rows are separated by a distance corresponding to at least double a distance between array bitlines.
地址 San Jose CA US
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