Write assist circuit and memory cell

摘要

A write assist circuit capable of writing data to a memory cell with a bit line and a bit line bar is provided. The write assist circuit includes a clamping circuit, and first and second sense amplifiers. The clamping circuit is coupled to first and second nodes to prevent the voltage of the first and second nodes from being lower than a data-retention voltage. The first and second nodes are supplied with first and second voltage sources. The first and second sense amplifier are utilized to detect the voltage of the bit line or the bit line bar, amplify the voltage and pull down the voltage of one of the first or second node according to the data while the voltage of the other one of the first or second node is kept at a power supply voltage level.

主权项

1. A write assist circuit, capable of writing data to a memory cell with a bit line and a bit line bar, comprising:
a clamping circuit, coupled to a first node and a second node to prevent the voltage of the first node and the second node from being lower than a data-retention voltage, wherein the second node is different from the first node, the first node and the second node are supplied with a first voltage source and a second voltage source different from the first voltage source, and the memory cell is supplied by the first voltage source at the first node and the second voltage source at the second node respectively; a first coupling circuit, connected between the first node and the bit line; and a second coupling circuit, connected between the second node and the bit line bar, wherein when the data is written to the memory cell, one of the first coupling circuit and the second coupling circuit is utilized to pull down a voltage of one of the first node or the second node according to the data while a voltage of the other one of the first node or the second node is kept at a power supply voltage level.