发明名称 Systems and methods for executing across at least one memory barrier employing speculative fills
摘要 Multi-processor systems and methods are provided. One embodiment relates to a multi-processor system that may comprise a processor having a processor pipeline that executes program instructions across at least one memory barrier with data from speculative data fills that are provided in response to source requests, and a log that retains executed load instruction entries associated with executed program instruction. The executed load instruction entries may be retired if a cache line associated with data of the speculative data fill has not been invalidated in an epoch that is different from the epoch in which the executed load instruction is executed.
申请公布号 US7360069(B2) 申请公布日期 2008.04.15
申请号 US20040756639 申请日期 2004.01.13
申请人 HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. 发明人 STEELY, JR. SIMON C.;TIERNEY GREGORY EDWARD
分类号 G06F9/00;G06F9/38;G06F12/08 主分类号 G06F9/00
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