| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To set an appropriate correction value according to capacity between floating gates of adjacent cells. <P>SOLUTION: In a memory cell array 1, a plurality of memory cells storing a plurality of bits are connected to a plurality of word lines and a plurality of bit lines, and they are arranged in a matrix state. A control part 7 reads the threshold level of a second memory cell adjacent to a first memory cell in the memory cell array, decides a correction value corresponding to the threshold level read from the second memory cell, the decided correction value is added to the read level of the first memory cell, and reads the threshold level of the first memory cell. A memory part 7-1 stores the correction value. <P>COPYRIGHT: (C)2008,JPO&INPIT</p> |
