METHOD OF MAKING A CMOS SEMICONDUCTOR DEVICE USING A STRESSED SILICON-ON-INSULATOR (SOI) WAFER

摘要

A method for forming a complementary metal oxide semiconductor (CMOS) semiconductor device includes providing a stressed silicon-on-insulator (sSOI) wafer comprising a stressed semiconductor layer having first and second laterally adjacent stressed semiconductor portions. The first stressed semiconductor portion defines a first active region. The second stressed semiconductor portion is replaced with an unstressed semiconductor portion. The unstressed semiconductor portion includes a first semiconductor material. The method further includes driving a second semiconductor material into the first semiconductor material of the unstressed semiconductor portion defining a second active region.

主权项

1. An electronic device, comprising:
a stressed silicon-on-insulator (SOI) substrate including a substrate, an insulating layer on the substrate, and a stressed semiconductor layer on the insulating layer, the stressed semiconductor layer having first and second laterally adjacent stressed semiconductor portions, the first stressed semiconductor portion including silicon and defining a first active region; the second stressed semiconductor portion including a stressed silicon bottom layer and a stressed silicon-germanium top layer on the stressed silicon bottom layer defining a second active region; and a trench isolation region separating the first and second laterally adjacent stressed semiconductor portions and extending through the insulating layer and into the substrate.