发明名称 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD OF THE SAME
摘要 PROBLEM TO BE SOLVED: To reduce heat resistance from an element surface of a semiconductor chip to a surface of a semiconductor package; and achieve easy division patterning of metal and considerably reduce stress generated due to a difference in thermal expansion coefficients of silicon and metal to improve environmental reliability; and achieve low cost by manufacturing a semiconductor package without using a TIM material.SOLUTION: A semiconductor package includes: a semiconductor chip which has an element surface where electrodes are arranged and a rear face opposite to the element surface and which is covered with resin; first wiring connected directly with the electrodes or via first openings arranged on the resin; and second wiring connected to the rear face via second openings arranged on the resin.SELECTED DRAWING: Figure 12
申请公布号 JP2016201468(A) 申请公布日期 2016.12.01
申请号 JP20150080718 申请日期 2015.04.10
申请人 J DEVICES:KK 发明人 WATANABE SHINJI;IWASAKI TOSHIHIRO;TAMAGAWA MICHIAKI
分类号 H01L23/12;H01L23/28;H01L23/29 主分类号 H01L23/12
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