发明名称 Memory operations using system thermal sensor data
摘要 Memory operations using system thermal sensor data. An embodiment of a memory device includes a memory stack including one or more coupled memory elements, and a logic chip coupled with the memory stack, the logic chip including a memory controller and one or more thermal sensors, where the one or more thermal sensors include a first thermal sensor located in a first area of the logic chip. The memory controller obtains thermal values of the one or more thermal sensors, where the logic element is to estimate thermal conditions for the memory stack using the thermal values, the determination of the estimated thermal conditions for the memory stack being based at least in part on a location of the first thermal sensor in the first area of the logic element. A refresh rate for one or more portions of the memory stack is modified based at least in part on the estimated thermal conditions for the memory stack.
申请公布号 US9396787(B2) 申请公布日期 2016.07.19
申请号 US201113997975 申请日期 2011.12.23
申请人 Intel Corporation 发明人 Shoemaker Kenneth;Fahey Paul
分类号 G11C7/04;G11C11/406;G06F1/20;G11C5/02 主分类号 G11C7/04
代理机构 Blakely, Sokoloff, Taylor & Zafman LLP 代理人 Blakely, Sokoloff, Taylor & Zafman LLP
主权项 1. A memory device comprising: a memory stack including one or more coupled memory elements; and a logic chip coupled with the memory stack, the logic chip including a memory controller and one or more thermal sensors, where the one or more thermal sensors include a first thermal sensor located in a first area of the logic chip; wherein the memory controller is to obtain thermal values of the one or more thermal sensors, the logic chip to estimate thermal conditions for the memory stack using the thermal values, the determination of the estimated thermal conditions for the memory stack being based at least in part on a location of the first thermal sensor in the first area of the logic chip; and wherein a refresh rate for one or more portions of the memory stack is modified based at least in part on the estimated thermal conditions for the memory stack.
地址 Santa Clara CA US