发明名称 |
Hybrid pipelined analog-to-digital converter |
摘要 |
An analog-to-digital converter (ADC) that comprises a first ADC stage and a second ADC stage. The first ADC stage comprises a successive approximation register (SAR). The first ADC is configured to convert an analog input signal into a first digital signal corresponding to a most-significant-bits (MSB) portion of a digital output signal. The first ADC stage is also configured to generate a residual voltage corresponding to a difference between a voltage value of the analog input signal and the first digital signal. The second ADC stage comprises a plurality of time-to-digital converter (TDC) cells coupled in series. The second ADC is configured to convert the residual voltage into a plurality of second digital signals generated by the TDC cells. The second digital signals correspond to a least-significant-bits (LSB) portion of the digital output signal. The digital output signal is a digital representation of the analog input signal. |
申请公布号 |
US9425815(B2) |
申请公布日期 |
2016.08.23 |
申请号 |
US201514600702 |
申请日期 |
2015.01.20 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
Kinyua Martin |
分类号 |
H03M1/50;H03M1/46;G04F10/00;H03M1/14 |
主分类号 |
H03M1/50 |
代理机构 |
Hauptman Ham, LLP |
代理人 |
Hauptman Ham, LLP |
主权项 |
1. An analog-to-digital converter (ADC) comprising:
a first ADC stage, the first ADC stage comprises a successive approximation register (SAR), the first ADC stage is configured to convert an analog input signal into a first digital signal corresponding to a most-significant-bits (MSB) portion of a digital output signal, and to generate a residual voltage corresponding to a voltage value difference between the analog input signal and the first digital signal; and a second ADC stage coupled with the first ADC stage, the second ADC stage comprises a plurality of time-to-digital converter (TDC) cells coupled in series, the second ADC stage is configured to convert the residual voltage into a plurality of second digital signals, wherein the second digital signals of the plurality of second digital signals collectively correspond to a least-significant-bits (LSB) portion of the digital output signal, and each TDC cell of the plurality of TDC cells is configured to generate a second digital signal of the plurality of second digital signals. |
地址 |
TW |