发明名称 METHOD FOR MANUFACTURING INTEGRATED CIRCUIT DEVICE
摘要 According to one embodiment, a method is disclosed for manufacturing an integrated circuit device, the method can include forming a mask member on a first film, the mask member having a pattern, performing a first etching on the first film using the mask member as a mask to form a recessed section in the first film, forming a second film covering an inner side surface of the recessed section. The second film has a film thickness of preventing blockage of the recessed section, and performing a second etching on the second film and the first film via the recessed section. The performing of the second etching includes performing a third etching in a condition of an etching rate at a place smaller in curvature radius in the recessed section being lower than an etching rate at a place larger in curvature radius in the recessed section.
申请公布号 US2016379843(A1) 申请公布日期 2016.12.29
申请号 US201514847582 申请日期 2015.09.08
申请人 Kabushiki Kaisha Toshiba 发明人 YAHASHI Katsunori
分类号 H01L21/311;H01L21/32;H01L21/306;H01L29/66;H01L27/115;H01L21/308;H01L21/02;H01L21/265 主分类号 H01L21/311
代理机构 代理人
主权项 1. A method for manufacturing an integrated circuit device, comprising: forming a first film on a substrate; forming a mask member on the first film, the mask member having a pattern; performing a first etching on the first film using the mask member as a mask to form a recessed section in the first film; forming a second film covering an inner side surface of the recessed section, the second film having a film thickness of preventing blockage of the recessed section; and performing a second etching on the second film and the first film via the recessed section, the performing of the second etching including performing a third etching in a condition of an etching rate at a place smaller in curvature radius in the recessed section being lower than an etching rate at a place larger in curvature radius in the recessed section.
地址 Minato-ku JP