| 摘要 |
PROBLEM TO BE SOLVED: To simplify circuit arrangement used for reading data. SOLUTION: This semiconductor memory device comprises a first memory cell array block provided with a memory cell having a floating body connected between a word line, a first bit line, and a first source line; a second memory cell array block provided with a reference memory cell having a floating body connected between a reference word line, a second bit line, and a second source line; a first isolation gate section which transmits signals to at least one of lines between the first bit line, a sense bit line, and a reversal sense bit line; a second isolation gate section which transmits the signals to at least one of lines between the second bit line, the sense bit line, and the reversal sense bit line; and a sense amplification section which amplifies voltages of the sense bit line and the reversal sense bit line up to a first sense amplification voltage level and a second sense amplification voltage level, respectively. COPYRIGHT: (C)2007,JPO&INPIT
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