发明名称 |
PARITY INTERLEAVING APPARATUS FOR ENCODING FIXED-LENGTH SIGNALING INFORMATION, AND PARITY INTERLEAVING METHOD USING SAME |
摘要 |
A parity interleaving apparatus and method for fixed-length signaling information are disclosed. The parity interleaving apparatus according to one embodiment of the present invention comprises: a processor which divides, into a plurality of groups, parity bits of an LDPC code word having a length of 16200 and a code rate of 3/15, and generates a parity bit string for parity puncturing by group-wise interleaving the groups using a group-wise interleaving order; and a memory for providing the parity bit string for parity puncturing to a parity puncturing unit. |
申请公布号 |
WO2016137204(A1) |
申请公布日期 |
2016.09.01 |
申请号 |
WO2016KR01757 |
申请日期 |
2016.02.23 |
申请人 |
ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE |
发明人 |
PARK, Sung-Ik;KWON, Sun-Hyoung;LEE, Jae-Young;KIM, Heung-Mook |
分类号 |
H03M13/27;H03M13/11 |
主分类号 |
H03M13/27 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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