发明名称 Obscuring memory access patterns in conjunction with deadlock detection or avoidance
摘要 Methods, apparatus and systems for memory access obscuration are provided. A first embodiment provides memory access obscuration in conjunction with deadlock avoidance. Such embodiment utilizes processor features including an instruction to enable monitoring of specified cache lines and an instruction that sets a status bit responsive to any foreign access (e.g., write or eviction due to a read) to the specified lines. A second embodiment provides memory access obscuration in conjunction with deadlock detection. Such embodiment utilizes the monitoring feature, as well as handler registration. A user-level handler may be asynchronously invoked responsive to a foreign write to any of the specified lines. Invocation of the handler more frequently than expected indicates that a deadlock may have been encountered. In such case, a deadlock policy may be enforced. Other embodiments are also described and claimed.
申请公布号 US8407425(B2) 申请公布日期 2013.03.26
申请号 US20070966794 申请日期 2007.12.28
申请人 GUERON SHAY;SHEAFFER GAD;RAIKIN SHLOMO;INTEL CORPORATION 发明人 GUERON SHAY;SHEAFFER GAD;RAIKIN SHLOMO
分类号 G06F12/00 主分类号 G06F12/00
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