| 摘要 |
PROBLEM TO BE SOLVED: To provide a counter circuit operable at a higher clock frequency. SOLUTION: The counter circuit, in order to attain the operation at the higher frequency, is configured with a first and second counter circuits 1, 2 for counting the number of input signals, and a counter output switching circuit 3 for switching output signals of the first and second counter circuits 1, 2. COPYRIGHT: (C)2006,JPO&NCIPI
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