发明名称 Solving MLC NAND paired page program using reduced spatial redundancy
摘要 Reduced spatial redundancy of lower bits data can provide data protection for a flash memory having MLC NAND devices operated in page mode. An interrupted write operation of most significant bit pages can corrupt previously written data in lower bit pages. The lower bits redundant memory can assist in restoring the data, using less than a full back up storage.
申请公布号 US2016216910(A1) 申请公布日期 2016.07.28
申请号 US201615089601 申请日期 2016.04.04
申请人 Virtium LLC 发明人 Phan Lan Dinh
分类号 G06F3/06;G11C11/56 主分类号 G06F3/06
代理机构 代理人
主权项 1. A method of managing a memory, the method comprising configuring a first memory and a second memory, wherein the first memory and the second memory each comprises a plurality of multi-level cell (MLC) memory cells,wherein each MLC memory cell comprises at least a least significant bit (LSB) and a most significant bit (MSB); writing first data to multiple LSBs of the MLC memory cells of the first memory; duplicating the first data to multiple LSBs of the MLC memory cells of the second memory; writing second data to at least a MSB of the MLC memory cells of the first memory after writing and duplicating the first data.
地址 Rancho Santa Margarita CA US