发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor storage device which allows a standby current thereof to be surely reduced thereby exactly detecting an address of a memory cell that is defective in standby but normal in operation without adversely affecting the normal memory cell. SOLUTION: Memory power supply lines (MVDLa, MVDLb) are disconnected from a power supply node by switch gates (215a,215b) in test operation. Voltages of the memory power supply lines are detected by detection holding circuits (16a,16b), and when the detected voltage is equal to or lower than a predetermined value, the corresponding memory power supply line is driven to a ground voltage level. The voltage level of this memory power supply line is latched by latch circuits (200a,200b) to set the switch gates to a continuity/non-continuity state according to latch signals. Thereby, the memory cell that is defective in standby but normal in operation is set to the operation-defective state. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007220289(A) 申请公布日期 2007.08.30
申请号 JP20070079093 申请日期 2007.03.26
申请人 RENESAS TECHNOLOGY CORP 发明人 OBAYASHI SHIGEKI;KASHIHARA HIROTSUGU;UKITA MOTOMU
分类号 G11C29/04;G01R31/28;G11C11/413 主分类号 G11C29/04
代理机构 代理人
主权项
地址