Electronic circuit for remapping faulty memory arrays of variable size

摘要

A memory under repair having variable size blocks of failed memory addresses is connected to a TCAM comprising cells storing data values of ranges of the failed memory addresses in the memory under repair. The TCAM is connected to a virtual address line. Matchlines in the TCAM drive wordlines in a RAM connected to the TCAM. Each entry in the TCAM corresponds to one entry in the RAM and represents a single block of failed memory addresses. A first input of an XOR gate in an integrated circuit device is operatively connected to the RAM and a second input is operatively connected to the virtual address line. Responsive to a virtual address being an address in one of the ranges of failed memory addresses, the XOR gate calculates a physical memory address redirecting the virtual address to an unused good memory location in place of the failed memory address.

主权项

1. An integrated circuit structure, comprising:
a memory under repair having variable size blocks of failed memory addresses; a first memory operatively connected to a virtual address line, said first memory comprising cells storing data values comprising ranges of said failed memory addresses in said memory under repair; a second memory operatively connected to said first memory, matchlines of said first memory driving wordlines in said second memory, each entry in said first memory corresponding to one entry in said second memory and each entry representing a single block of failed memory addresses; and a gate having two inputs, a first input being operatively connected to said second memory and a second input being operatively connected to said virtual address line, responsive to a virtual address being an address in one of said ranges of said failed memory addresses in said memory under repair, said gate calculating a physical memory address redirecting said virtual address to an unused good memory location in place of said failed memory address in said memory under repair.